Mobicon-Remote Electronic Pte Ltd
50 Ubi Ave 3,
#02-06 Frontier,
Singapore 408866.
50 Ubi Ave 3,
#02-06 Frontier,
Singapore 408866.
+65-67477472
+65-67476768
UTC UC3856 PWM CONTROLLER
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LOW COST POWER-SAVING MODE PWM CONTROLLER FOR FLYBACK CONVERTERS
DESCRIPTION
The UTC UC3856 is a high performance current mode PWM controller ideally suited for low standby power. An externally JFET’s gate pin is connected the ST pin, It can achieve HV start, and when start was overed, it is no long consume current to depress the power off. Low VDD startup current make the power reliable on startup design and a large value resistor could be used in the startup circuit to minimize the standby power. At no load condition, the IC operates in power-saving mode for lower standby power, decreasing frequency for Higher conversion efficiency at light load condition. The UTC UC3856 contains protection with automatic recovery including OLP (over load protection), OTP (over temperature protection), OVP (over voltage protection), UVLO (VDD over voltage clamp and under voltage lockout).To protect the power MOSFET, Gate-drive output is fixed up to 15V max. The UTC UC3856 contains protection OCP (cycle-by-cycle current limiting). The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch, which offering minimal external component count in the design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique (ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than 20kHz during operation. The UTC UC3856 has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet printers, open-frame SMPS.
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI performance.
* Power-saving mode for high light-load and standby efficiency
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OTP,OLP,OVP and VDD clamp for higher security
* High efficiency HV start
* Gate output voltage clamped at 15V
* Low start-up current
* Cycle-by-cycle current limiting
* Under voltage lockout (UVLO)
* Few external components required
DESCRIPTION
The UTC UC3856 is a high performance current mode PWM controller ideally suited for low standby power. An externally JFET’s gate pin is connected the ST pin, It can achieve HV start, and when start was overed, it is no long consume current to depress the power off. Low VDD startup current make the power reliable on startup design and a large value resistor could be used in the startup circuit to minimize the standby power. At no load condition, the IC operates in power-saving mode for lower standby power, decreasing frequency for Higher conversion efficiency at light load condition. The UTC UC3856 contains protection with automatic recovery including OLP (over load protection), OTP (over temperature protection), OVP (over voltage protection), UVLO (VDD over voltage clamp and under voltage lockout).To protect the power MOSFET, Gate-drive output is fixed up to 15V max. The UTC UC3856 contains protection OCP (cycle-by-cycle current limiting). The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge blanking on current sense input removes the signal glitch, which offering minimal external component count in the design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique (ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than 20kHz during operation. The UTC UC3856 has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet printers, open-frame SMPS.
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI performance.
* Power-saving mode for high light-load and standby efficiency
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OTP,OLP,OVP and VDD clamp for higher security
* High efficiency HV start
* Gate output voltage clamped at 15V
* Low start-up current
* Cycle-by-cycle current limiting
* Under voltage lockout (UVLO)
* Few external components required